1. Field of the Invention
The present invention relates to microprocessor architecture and, more particularly, to systems and methods for exercising microprocessor bus control.
2. Description of Related Art
The prior art is replete with computing systems including a processor, a system memory, and a bus interconnecting the processor, and the system memory. The prior art is also replete with computing systems that include peripheral devices [such as direct memory access ("DMA") controllers] in addition to the processor, memory and bus mentioned above, which peripheral devices effect access to the system memory by temporarily assuming control of the bus.
In conventional computer systems heretofore developed, the processor is designated the "master" of the bus and is allowed sole use of the bus (e.g., to access system memory) unless and until the processor relinquishes control of the bus to a peripheral device. Thus, heretofore, a peripheral device needing to access system memory has had to request use of the bus from the processor. If and when the processor is ready to relinquish use of the bus to the peripheral device, the processor effects a grant of temporary use.
A shortcoming and deficiency of the above-described types of systems relates to efficiency of processor operation during time periods in which a peripheral device has control of the system bus. Heretofore during time periods in which the processor has not had control of the bus it has been in a "hold" or "off" state. Thus, when not in control of the system bus, prior art processors effectively accomplish no work.
While the above-identified shortcoming and deficiency may be understandable and excusable in situations in which there is nothing that can be accomplished by the processor without the system bus (e.g., when the processor must have access to the system memory in order to operate), this shortcoming and deficiency directly lowers efficiency of system operation in situations in which the processor can perform useful functions without using the system bus.
A prime example of the latter type of situation is one in which the processor has an internal memory (e.g., actually on the processor chip), which internal memory is accessible via an internal bus, and in which the processor can operate without requiring any use of the external system bus whatsoever.